BusDef Documentation from the 1.2 Users Guide
4.10 Reference Bus Definitions
The SPIRIT Consortium has prepared a set of BusDefs for several common busses. It is expected, over time, that those standards groups and manufacturers who define busses will include spirit XML BusDefs in their set of deliverables. Until that time, and to cover some existing useful busses, a set of BusDefs for common busses has been created.
Having a set of reference BusDefs means that many vendors defining IP using these busses can interconnect. The SPIRIT consortium posts these for use by their members, with no warrantee of suitability, but in the hope that these will be useful. The SPIRIT Consortium will from time to time, update these files and if a Standards body wishes to take over the work of definition, will transfer that work to that body.
4.10.1 The difference between an external bus and an internal/digital interface
While the current use of SPIRIT schema may be viewed as describing single chip implementations, the schemas works equally well at the package and board level. Often a PHY component exists which interconnects the internal and external bus. Some standards define both of these interfaces, some define only the internal and some define only the external. A common point of confusion is to use an external bus standard as an interface on an internal component. This is legal if the component caries the full PHY implementation, but often will make the component very technology/implementation dependant. Some examples of busdef families that include both interfaces are listed below:
4.10.1.1 Example: Ethernet Interfaces:
An Ethernet "bus" would not be only described as a single wire, but in a system that includes Ethernet busses, it may also include, for example:
Figure 25 - Ethernet Interface Examples
-
XAUI: 10-gigabit Attachment Unit Interface
-
MII: Media Independent Interface
-
GMII: Gigabit Media Independent Interface
-
XGMII: 10-gigabit media-independent interface
-
RMII: Reduced MII, 7-pin interface
-
SSMII: Source Synchronous MII
-
SMII: Serial Media Independent Interface, The Serial Media Independent Interface [SMII] provides an interface to Ethernet MAC. The SMII provides the same interface as the Media Independent Interface [MII] but with a reduced pinout. The reduction in signals is achieved by multiplexing data and control information to a signal transmit signal and a single receive signal.
4.10.1.2 Example: I2C Bus
The I2C "eye-squared-see" bus is a two-wire bus with a clock and data line. The standard described bus is the two-wire bus. Spirit has defined an additional, related bus which is the internal digital interface. This reference BusSpec contains three pins for each external pin: for SDA (the data line) the internal pins are defined as input, output, and enable as SDA_I, SDA_O, and SDA_E, in a similar manner for the clock bus: SCL the internal pins are defined again for the functions of input, output, and enable as SCL_I, SCL_O, and SCL_E
Figure 26 - I2C Interface Example
4.10.2 Location of reference BusDefs
The reference BusDefs are available here.